Yesterday, a small package from Bulgaria arrived. Inside: an Olimex GateMate A1-EVB board, in red, with VGA and PS/2 connectors. Today, I registered my project on gitlab and made my first commit: txtmode-ucs2-video on GitLab. After thirty years of thinking about this, the journey has finally begun.
Let me explain.
For as long as I can remember, I've been fascinated by the early personal computers - particularly the IBM PC and its successors. There was something beautiful about those machines: they were comprehensible. You could understand the whole system, from the CPU to the video controller to the keyboard interface. Everything had a reason, everything fit together.
But those machines also had limitations that always bothered me. The video controllers - MDA, CGA, EGA - were brilliant for their time, but they were constrained by the 8-bit character encodings of the era. Code page 437. Code page 850. Cyrillic code pages where you had to sacrifice box-drawing characters. If you wanted to display Russian and French in the same document, you were out of luck.
What if we could build something that kept the elegance of those classic systems but removed those limitations? A text-mode video controller with 16-bit UCS-2 character encoding - thousands of glyphs available simultaneously. And if the glyph is 16-bit, why not make the attribute 16-bit as well? 32-bit cells. Full RGB colors for each character. No more compromises.
This has been my vision for three decades. And now I have the hardware to make it real.
The GateMate A1-EVB is a modest FPGA board, but it's enough. The plan: build a complete personal computer around a RISC-V core. Text-mode video. PS/2 keyboard. Something that feels like sitting in front of an IBM AT, but with a modern processor and proper Unicode support.
Today's commit is laughably primitive. I took a Verilog VGA timing core from an open-source project called OGEGE and converted it to VHDL. Nothing works yet. Nothing has been tested or even simulated. I don't actually know VHDL - my copy of "Circuit Design with VHDL" hasn't even arrived yet, and my semester at ESISAR doesn't start for weeks.
But the first commit is there: vga_core.vhd. The journey of a thousand miles begins with a single step, and this is mine.
The board is on the table. Let's see where this goes.
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