A few more commits this week. Still haven't tried to synthesize anything, and honestly, I'm not in any rush.
I added a PLL module - Phase-Locked Loops are how you generate precise clock frequencies from whatever reference oscillator your board provides. The GateMate has a crystal oscillator on board; VGA text mode at 720×400@70Hz needs 28.322 MHz. The GateMate's CC_PLL primitive handles this, though I confess I don't understand half the parameters I'm setting. PERF_MD => "ECONOMY"? Sure, why not. I'm copying from examples and trusting the process.
Why 720×400? That's the original IBM VGA text mode resolution. 80 columns × 9 pixels = 720. 25 rows × 16 pixels = 400. There's a pleasing logic to these classic systems.
I also created a constraints file, gatemate1a-evb.ccf, mapping signals to physical pins. It would take me months to realize that "CC" in the extension stands for CologneChip. The file already has pin assignments for things I haven't built yet: PS/2 keyboard, PSRAM, 4-bit-per-channel RGB output. Planning ahead, or wishful thinking -- hard to say which.
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